RX was one interrupt + one wake per byte (HAL_UART_Receive_IT(...,1)
re-armed in HAL_UART_RxCpltCallback) — ~11.5k IRQ/s at 115200. Use the
STM32L4 hardware FIFO instead:

- uart_hw_init (non-console only): set TX/RX FIFO thresholds then
  HAL_UARTEx_EnableFifoMode, after HAL_UART_Init.
- uart_init_common: arm HAL_UARTEx_ReceiveToIdle_IT into a 32-byte
  per-slot scratch buffer. The hardware IDLE line flushes whatever has
  arrived ~1 char-time after the last byte, so latency stays low while
  bursts coalesce into one callback/wake instead of one per byte.
- HAL_UART_RxCpltCallback -> HAL_UARTEx_RxEventCallback: copy Size
  bytes scratch->rx_ring (unchanged drop-on-full policy), wake once,
  re-arm. TX path unchanged; FIFO + threshold batch it internally.
- Add HAL_UART_ErrorCallback: ORE/overrun aborts ReceiveToIdle with no
  RxEvent, so re-arm there to self-heal RX.
- Move slot->in_use=1 to the last write in uart_init_common so a
  failed open no longer leaves a slot stuck in-use.

Console (blocking, no IT) untouched. Public ABI unchanged.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

…link)

The FIFO + HAL_UARTEx_ReceiveToIdle_IT rewrite broke the IT UART link
on hardware (no TX/RX). Restore the proven per-byte HAL_UART_Receive_IT
implementation from before the FIFO change. The FIFO work remains in
history for a future hardware-validated attempt.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

Restores the FIFO + HAL_UARTEx_ReceiveToIdle_IT driver. RX FIFO
threshold is 1/8 so the FIFO ISR drains every byte (RXFT re-fires
while RXFNE) and the HAL's IDLE handler never strands sub-threshold
bytes — the per-frame RxEventCallback still cuts scheduler wakes and
the 8-byte FIFO cushions ISR latency.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

Collapse src/drivers/uart/{mod.rs,wait.rs} into one src/drivers/uart.rs,
matching the single-file layout of the other drivers (e.g. can.rs).
Layout: public types + global state + Device at the top, free-function
helpers (conversions, waiter registration, ISR dispatch) at the bottom.

Replace the bespoke per-slot intrusive waiter list (Waiter with
Cell<*mut Waiter>, unsafe impl Sync, IRQ-disable pointer splicing, a
transmute'd callback pointer — 205 lines, 10 unsafe sites) with two
ParkedWaiter per slot (RX/TX), the kernel's existing single-consumer
park/wake primitive that can.rs already uses. The merged file has 2
unsafe sites, both unavoidable and identical in discipline to can.rs:
the FFI crate::irq::register_irq call and the single &*(ctx as *const _)
cast in the ISR dispatch.

Drop the dead ChannelCallback / set_*_callback API and the unused
public register/unregister_*_waiter pass-throughs (no callers).

deinit() failures (open cleanup path and Drop) now warn! instead of
being silently discarded.

Behavior changes are confined to previously-unused paths:
- multi-waiter per channel removed (only ever 1 RX + 1 TX per slot);
- a 2nd concurrent reader/writer on a slot now returns Error::Busy
  (ParkedWaiter EBUSY) instead of silently queuing — matches the
  one-consumer-per-controller invariant the CAN driver documents.
read/write_with_timeout keep their exact timeout semantics. The
IPSR-indexed irqn+16, vector_dispatch, and ensure_registered are
unchanged.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>